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For Noise and Leakage Reduction躁声和漏电处理.pdf

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Decoupling Capacitor Planning and Sizing ∗ For Noise and Leakage Reduction Eric Wong, Jacob Minz, and Sung Kyu Lim School of Electrical and Computer Engineering Georgia Institute of Technology Atlanta, GA 30332 {ewong, jrminz, limsk} @ece.gatech.edu ABSTRACT during the ﬂoorplanning stage is desirable. A pioneering work on decap-aware ﬂoorplanning was proposed by [1]. However, a no- Decoupling capacitor (decap) is a popular means to reduce power ticeable limitation of this work is that it allows the blocks to utilize supply noise in integrated circuits. Since the decaps are usually inserted in the whitespace of the device layer, decap management the adjacent whitespace only. Although a majority of current is during the ﬂoorplanning stage is desirable. In this paper, we de- provided by neighboring decaps, it is still possible for a block to vise the Effective Decap Distance model to analyze how functional draw current from non-neighboring decaps. As VLSI technology continues to scale down, noise tolerances blocks are affected by non-neighboring decaps. In addition, we propose a generalized network ﬂow-based algorithm to allocate