数字电路课数字逻辑75.pptVIP

Design a generator for the periodic sequence (10110） as the clk triggered. The state/output table The state diagram Sequential logic design example A generator for the periodic sequence The output table Use binary code , minimal cost design The output equation The logic diagram The other way to design the circuit: Change the state assign for S0, save the output equation A generator for the periodic sequence The other way to design the circuit: A generator for the periodic sequence Synthesis examples A mode 8 counter with changeable state sequences The transition/output table Synthesis examples The transition/output table Synthesis examples The output equation The excite equations Use JK flip-flop States analyze examples Design a combination lock: The UNLOCK should be 1 if and only if X is 0 and the sequence of inputs received on X at the preceding seven clock ticks was 0110111. The HINT output should be 1 if and only if the current value of X is the correct one to move the machine closer to being in the “unlocked” state (with UNLK = 1) . Step 1: set up enough state with different meaning ; State name state meaning A 000 initial state, got no correct input; B 001 got 0 C 010 got 01 D 011 got 011 E 100 got 0110 F 101 got 01101 G 110 got 011011 H 111 got 0110111 States analyze examples: combination lock Step 2: set up the state diagram with correct input sequence ; States analyze examples: combination lock Step 3: finish the state diagram with incorrect input sequence ; States analyze examples: combination lock Step 4: from the state diagram to the state/output table; S*，UNLK HINT， X State meaning 0 1 A B，0，1 A，0，0 initial B B，0，0 C，0，1 0 C B，0，0 D，0，1 01 D E，0，1 A，0，0 011 E B，0，0 F，0，1 0110 F B，0，0 G，0，1 01101 G E，0，0 H，0，1 011011