I2S应用笔记(CS4272).docxVIP

I2S发送接收LRCK BCLK同步If the transmitter bit clock and frame sync are to be used by both the transmitter andreceiver:? The transmitter must be configured for asynchronous operation and the receiver forsynchronous operation.? In synchronous mode, the receiver is enabled only when both the transmitter andreceiver are enabled.? It is recommended that the transmitter is the last enabled and the first disabledWm8960从设备寄存器地址7位+寄存器位数9位=16位乒乓缓存区DMA的配置出于一般考虑，假设每个数据块有 N 个采样，每个采样有 L 个字节。则通过下列步骤可初始化 DMA 模块：1. 次循环偏移量使能且只应用于源地址，且值为 L – [(N *2) * (L*2)]。（次循环完成后源地址偏移）2. 次循环传输计数设为 L*2。（每次触发请求后传输的字节数）3. 源地址初始化至缓冲区基