soc设计方法与实现第11章低功耗.pptVIP

第十一章 低功耗设计 Outline Why low power Sources of power consumption Low power design methodology Low power techniques Power analysis and tools Trends in the future Why Low Power Potable system - Battery lifetime Example: mobile phone, PDA, Digital camera Desktops: high power consumption Reliability and performance Need expensive chip package, cooling system Several deleterious effects Decreased reliability and performance Increased cost: packaging cost and cooling system Exceed power limits of the chip system Power, Cost and Heat Component: silicon and package Increased die size (wider power busses) Need better thermal capabilities (package material) Need better electrical capabilities System: Cooling and mechanicals Larger fans Oversized power supplies Power limits to the wall ~1100W dc limit for 110V/20A plug Challenge of Design as Process Scaling Outline Why low power Sources of power consumption Low power design methodology Low power techniques Power analysis and tools Trends in the future Source of Power Consumption Dynamic power consumption Static power consumption Key areas of power consumption in SOC Source of Power Dissipation in CMOS Devices Static Power Consumption: Leakage currents: Sub-threshold current (I2) Gate leakage Gate tunnelling (I4) Gate induced drain leakage (I3) pn-junction reverse current (I1) DC currents Analog circuit: sense-amps, pull-ups State dependent Leakage vs. Process What will be the dominated leakage current? Outline Why low power Sources of power consumption Low power design methodology Low power techniques Low power analysis and tools Trends in the future Low Power Design Methodology Must know your system Maximize the performance while minimize the power consumption Minimize the power consumption while maximize the performance Opportunities for Power Saving Outline Why low power Sources of power consumption Low power design methodology Low power techniques Power analysis and tools Trends in the future Low Power Techniques