主机板架构.pptVIP

诀狾琜篶ざ残 揭祘ヘ: 硄筁癸揭祘厩策, ㄏ蝴镑秆磞瓃诀狾琜篶の璶CHIP┮ㄏノBUS. 硄盽诀狾常穦ㄇ璶箂ン㎝羆絬(BUS). 璶箂ン: Processor Chipset: North Bridge South Bridge Firmware Hub (FWH) Flash ROM Super I/O Controller (SIO) Trusted Platform Module Clock Generator System Monitor Audio Controller LAN controller Voltage Regulation 诀狾琜篶 Processor NorthBridge(MCH) SouthBridge(ICH) FWH SIO ClockGenerator Flash TPM Keyboard Mouse Floppy Serial Parallel USB IDE SATA SPI Bus DMI FSB / Host Bus System Management Bus PCI Bus PCIe x16 Bus PCIe x1 Bus LPC Bus Host Clock PCI Clock System Mem