集成电路设计报告同步二进制加法计数器的设计与仿真fm6l41u3.docVIP

集成电路设计报告 同步二进制加法计数器的设计与仿真 院 系： 材料与光电物理学院 专 业： 微电子学一班 学 号： 姓 名： 指导教师： 报告提交日期： 2010 年 9 月 目 录 摘要 ····························································································· 1 关键词 ······································································································· 1 1 引言 ································································································· 2 2 时序逻辑电路······································································· 4 2.1 时序逻辑电路概述············································································