USB3500-芯片手册.docx

USB3500 PRODUCT FEATURES UTMI+ Specification, Revision 1.0. On-The-Go Supplement Revision 1.0a specification. Functional as a host, device or OTG PHY. UTMI+ Level 3 Supports HS SOF and LS keep alive pulse. Supports Host Negotiation Protocol (HNP) and Session Request protocol (SRP.) Integrated 24MHz Crystal Oscillator supports either crystal operation or 24MHz external clock input.后面由CLKOUT输出60MHz 时钟 Internal PLL for 480MHz Hi-Speed USB operation. Chapter 1 General Description The USB3500 uses a UTMI+ interface to connect to an SOC or FPGA or custom ASIC. SOC/FPGA/ASIC SOC/FPGA/ASIC Including Device Controller USB3500 USB 2.0 Analog w/ OTG USB Connector Standard ( or Mini) DM V BUS DP ID Hi-Speed USB App. UTMI+ Interface UTMI+ Digital Logic UTMI+ Link Figure 1.1 Basic UTMI+ USB Device Block Diagram ADDED FEATURES ADDED FEATURES UTMI+ Level 3 USB2.0 Peripheral, host controllers, On-the- Go devices (HS, FS, LS, preamble packet) UTMI+ Level 2 USB2.0 Peripheral, host controllers, Onthe-Go devices (HS, FS, and LS but no preamble packet) UTMI+ Level 1 USB2.0 Peripheral, host controllers, and On-the-Go devices (HS and FS Only) UTMI+ Level 0 USB2.0 Peripherals Only USB3500 USB3500 Figure 1.2 UTMI+ Level 3 Support Chapter 2 Functional Overview Chapter 3 引脚定义 Pin Definitions Table 3.1 USB3500 Pin Definitions PIN NAME DIRECTION, TYPE ACTIVE LEVEL DESCRIPTION 1 XCVRSEL[1:0] Input N/A Transceiver Select. These signals select between the FS and HS transceivers: Transceiver select. 00: HS 01: FS 10: LS 11: LS data, FS rise/fall times 2 TERMSEL Input N/A Termination Select. This signal selects between the FS and HS terminations: 0: HS termination enabled 1: FS termination enabled 3 TXREADY Output High Transmit Data Ready. If TXVALID is asserted, the Link must always have data available for clocking into the TX Holding Register on the rising edge of CLKOUT. TXREADY is an acknowledgement to the Link that the transceiver has clocked the data from the bus and is ready for the next