姜书艳 数字逻辑设计及应用 24知识课件.pptVIP

Chapter 8 Sequential Logic Design Practices ( 时序逻辑设计实践);8.4 Counter (计数器);8.4 Counter (计数器);A Synchronous Binary Up Counter(同步二进制加法计数器);A Synchronous Binary Up-Counter(同步二进制加法计数器);MSI Counters (MSI计数器);MSI Counter (MSI计数器);Any Modulus Counter(任意模值计数器);Any Modulus Counter(任意模值计数器);Any Modulus Counter(任意模值计数器);Cascading Counter (计数器的级联);Modulo-m Counter(模m计数器（ m 2n）);6310 = ( 0011 1111 )2; CLK CLR LD ENP ENT A QA B QB C QC D QD RCO;Analysis what the modulo of the following circuit is ?(分析下面的电路的模为多少？);Exercise： Analysis what the modulo of the following circuit is ? (练习:分析下面的电路的模为多少？) ？;8.5 Shift Register（移位寄存器）;Serial-In, Parallel-Out Shift Register (串入并出移位寄存器);Parallel-In, Serial-Out (并入串??移位寄存器);Parallel-In, Parallel-Out (并入并出移位寄存器);8.5.2 MSI Shift Register (MSI移位寄存器);4-Bit Universal Shift Register (4位通用移位寄存器74x194);00;S1 S0 功能; CLK CLR S1 S0 LIN D QD C QC B QB A QA RIN;8.5.3 Shift-Register Counters(移位寄存器计数器);1000;有效状态;8.5.5 Twisted-Ring Counters（扭环计数器）;第8章 作业