倒装芯片装联工艺及多载荷条件下焊点可靠性评估研究-材料加工工程专业论文.docx

华中科技大学硕士学位论文 华 中 科 技 大 学 硕 士 学 位 论 文 II万方数据 II 万方数据 Abstract Flip chip technique is one of the most attracting techniques in modern electronic packaging field, and plays an important role in portable electronics, Multi-chip module (MCM), high frequency communications and flat panel display modules. Flip chip on board (FCOB) can provide the highest packaging density in 2D package. However, the interconection process, materials selection and reliability assement still need further research and improvement. Otherwise, the real service environment of microelectronic devices commonly includes a fluctuated temperature and electrical current, which means electromigration (EM) and thermomechanical fatigue (TMF) may intertwine with each other and none of the solitary models can be used to explain the failure of the joint. Therefore, the reliability assement of solder joints under thermal shock and current density is a note worthy matter. In this paper，an orthogonal experimental design is carried out to get the optimal process conditions for achieving SAC305 solder bumped FCOB assembly with maximum die shear force and minimum void rate. After shear test, three types of fracture interface locations are observed, and the most frequently occurring fracture mode is the ductile fracture in bulk solder near the chip side. Reliability tests for SAC305 solder bump joints are carried out under three loading conditions, which are thermal shock, electric current and the combined load of thermal shock and electric current. The lifetime data analysis shows that the mean time between failure (MTTF) under combined load is much shorter than that under single load, which indicates that combined load apporch can help to reduce test time. The failure of the solder joint under thermal shock condition was associated with changes of microstructures by recrystallization in the strain concentration regions of the solder interconnections. Coarsening of intermetallic particles and the disappearance of