上海交大ARM培训教材AMBA V20.pptVIP

The control vector allows the user to change the default state of the test bus master. Normally all that can be changed using address, read and write vectors are HADDR, HTRANS and HWRITE. The control vector then allows you to alter any of the other standard bus master outputs. Bits 7 to 0 are the same for an ASB based system, so vectors written for ASB will work with AHB as well. However if you wish to use the extra features of AHB then the control vector has been extended to 12 bit long. Bits 8 and 1 should be set to zero. (note that bit 8 forces ASB based systems to not perform Non-Seq cycl