资料课件文稿suc数字ic之dc dc1_200703_sg_11_addl_comp_tech.pptxVIP

;Unit Objectives;Load designs and libraries;Improving Results and Compile Times;Overview of Techniques;Unit Agenda;Arithmetic Components;What is the DesignWare Library?;;Enabling the DesignWare Library;DesignWare Recommendations;Unit Agenda;The problem: Large Delay between Registers;Some Things to Try …; The clock frequency is limited by the total delay in the slowest pipeline stage (the multiplier):;;;What optimize_registers does;What does compile_ultra -retime do?;Adaptive Retiming Details;Pipeline Assumptions and Recommendations;Register Repositioning Flow Example;Resulting Pipeline;Maintaining Registered Outputs;Register Repositioning Recommendations;Unit Agenda;Partitioning Example 1: Sub-blocks;Partitioning Example 2: DesignWare Parts;Ungrouping During Compile;Auto-Ungrouping with Ultra;Controlling Auto-Ungrouping;Design Partitioning Recommendations;Unit Agenda;;DRC Priority Recommendation;Unit Agenda;;Problem: Sub-Critical Paths Ignored;To_Be_Synthesized;Custom path groups allow more control over optimization Each path group is optimized independently Worst violator in one path group does not prevent optimization in another group;# Ensure that the reg-reg paths get optimized group_path -name INPUTS -from [all_inputs] group_path -name OUTPUTS -to [all_outputs] group_path -name COMBO -from [all_inputs] -to [all_outputs];Prioritizing Path Groups: -weight;Example: -weight;Applying a Critical Range;# Example: Assign a critical range to each path group group_path -name CLK1 -critical_range 0.3 –weight 5 group_path -name CLK2 -critical_range 0.1 –weight 5 group_path –name CLK3 –critical_range 0.2 –weight 2 group_path –name INPUTS –from [all_inputs] group_path –name OUTPUTS –to [all_outputs] group_path –name COMBO –from [all_inputs] –to [all_outputs] report_path_group;Path Group Recommendations;Test for Understanding 1/4;Test for Understanding 2/4;Test for Understanding 3/4;Test for Understanding 4/4;Unit Agenda;Selecting the Appropriate Flow;DC Expert Flow - No