EDA技术应用3.2.2元器件手册ds617.pdfVIP

9 R 0 Platform Flash XL High-Density Configuration and Storage Device DS617 (v2.2) October 29, 2008 Preliminary Product Specification Features • In-System Programmable Flash Memory Optimized for • Memory Organization Virtex®-5 FPGA Configuration ♦ 128-Mb Main Array Capacity • High-Performance FPGA Bitstream Transfer up to ♦ 16-bit Data Bus 800 Mb/s (50 MHz(1) ×16-bits), Ideal for Virtex-5 FPGA PCI Express® Endpoint Applications ♦ Multiple 8-Mb Bank Architecture for Dual Erase/Program and Read Operation • MultiBoot Bitstream, Design Revision Storage ♦ 127 Regular 1-Mb Main Blocks • FPGA Configuration Synchronization (READY_WAIT) Handshake Signal ♦ 4 Small 256-Kb Parameter Blocks • ISE® Software Support for In-System Programming via • Synchronous/Asynchronous Read Modes Xilinx® JTAG Cables(2) ♦ Power-On in Synchronous Burst Read Mode at up • Standard NOR-Flash Interface for Access to Code or to 54 MHz Data Storage ♦ Asynchronous Random Access Time = 85 ns • Operation over Full Industrial Temperature Range ♦ Accelerated Asynchronous Page Read Mode (–40°C to +85°C)