LED晶圆级封装与集成.pdfVIP

LED晶圆级封装及相关关键技术 LED Wafer Level Packaging and Associated Enabling Technologies 李世玮主任 香港科技大学LED-FPD工程技术研究开发中心 佛山市南海区桂城瀚天科技城 Ricky Lee Director HKUST LED-FPD Technology RD Center at Foshan 第八期技术工作坊 2012年12月19 日 1 Trend of LED Package Type Wafer Level Packaging Source: Yole Wafer Level Packaging Market Trend of ICs Source: Yole TSMC’s Announcement on LED WLP Source: TSMC Typical Cost Breakdown of LED Packages 2 (100 mm sapphire substrate; 1 mm die; phosphor converted; high power package) Sources: SSL Manufacturing Roadmap 2012 Cost Trend of LED Packages Sources: SSL Manufacturing Roadmap 2012 Considerations in Wafer Level Packaging (WLP) Semi Wafer Level Packaging Dice the device wafer first and then mount the diced chips on a carrier wafer for the subsequent wafer level packaging processes; the packaged carrier wafer is diced into components at the end. Full Wafer Level Packaging Bond the device wafer to the carrier wafer(s) directly without dicing; after completing all wafer level packaging processes, the stacked wafers are diced into packaged components. Enabling Technologies for LED WLP Preparation of submount wafer Chip mounting and/or wafer bonding Interconnection Phosphor deposition Encapsulation Array lenses Industrial Develop