TMS320x2833x, 2823x Inter-Integrated Circuit (I2C) Module Reference Guide （TMS320F28335芯片资料（主芯片））.pdfVIP

TMS320x2833x, 2823x Inter-Integrated Circuit (I2C) Module Reference Guide Literature Number: SPRUG03B August 2008–Revised June 2011 2 SPRUG03B–August 2008–Revised June 2011 Submit Documentation Feedback Copyright © 2008–2011, Texas Instruments Incorporated Contents Preface 7 1 Introduction to the I2C Module 11 1.1 Features 12 1.2 Features Not Supported 12 1.3 Functional Overview 12 1.4 Clock Generation 13 2 I2C Module Operational Details 14 2.1 Input and Output Voltage Levels 14 2.2 Data Validity 14 2.3 Operating Modes 15 2.4 I2C Module START and STOP Conditions 16 2.5 Serial Data Formats 16 2.6 NACK Bit Generation 18 2.7 Clock Synchronization 18 2.8 Arbitration 19 3 Interrupt Requests Generated by the I2C Module 20 3.1 Basic I2C Interrupt Requests 20 3.2 I2C FIFO Interrupts 21 4 Resetting/Disabling the I2C Module 21 5 I2C Module Registers 21 5.1 I2C Mode Register (I2CMDR) 23 5.2 I2C Extended Mode Register (I2CEMDR) 26 5.3 I2C Interrupt Enable Register (I2CIER) 28 5.4 I2C Status Register (I2CSTR) 28 5.