dram内存颗粒测试简介.pptx

Agenda Basis of Testing Typical DRAM Testing Flow Burn-in DC Test (Open/Short, Leakage, IDD) Functional Test & Test Pattern Speed Test 第1页/共37页 DRAM Manufacture Wafer Assembly Final Testing Final Product 第2页/共37页 Why Testing? To screen out defect Wafer defect Assembly defect Make sure product meet spec of customer Voltage guard band Temperature guard band Timing guard band Complex test pattern Collect data for design & process improvement Quality Reliability Cost Efficiency 第3页/共37页 IC Test Methodology IC Tester PPS Driver Comparator DUT* * DUT = Device Under Test Power Supply Output Input Testing of a DUT: 1. To connect PPS, Driver, Comparator & GND. 2. To apply power to DUT. 3. To input data to DUT (Address, Control Command, Data) 4. To compare output with “expect value” and judge PASS/FAIL 第4页/共37页 Basic Test Signal Digital Waveform Elements Logic Voltage Timing 第5页/共37页 Typical DRAM Final Test Flow 第6页/共37页 DRAM Burn-in (MBT) MBT is to stress IC and screen out early failures High Temperature Stress (125degC) High Voltage Stress Stressful Pattern Bath Curve 第7页/共37页 DRAM Burn-in (TBT) TBT is for long time test patterns Multiple temperature tested (e.g. 88’C, 25’C, -10’C) Long test time at low speed Patterns cover all cell arrays No Stressful condition High parallel test count, low cost Both MBT and TBT does NOT test DC (Ando Oven) 第8页/共37页 DRAM Advantest Test DC Test Open/Short test Leakage test IDD test Functional Test (Core Test) Different parameter & Pattern for each function To check DRAM can operate functionally Speed Test Timing test @ different speed grade 第9页/共37页 DC Test DC Test Method: ISVM: I Source V Measure VSIMV Source I Measure VCC 第10页/共37页 DC Test – Open Short Purpose: Check connection between pins and test fixture Check if pin to pin is short in IC package Check if pin to wafer pad has open in IC package Check if protection diodes work on die It is a quick electrical check to determine if it is safe