无线路由器系统测试与实施 3G 4G 家庭嵌入式娱乐设备.docxVIP

HW/SW HW/SW implementation Digital Signal Processing of ECG beat detection and classification systemThe aim of this paper is to present an FPGA-oriented design for ECG signal processing. The system systemperforms QRS complex detection and beat classification into either normal or premature ventricular contractions. QRS complex detection is made with an algorithm based on a phase-space portrait of an ECG signal, while for beat classification a part of the Open Source ECG Analysis Software is used. The former is performed in HW and the latter in SW on an integrated PowerPC 405 core. The algorithm was developed on the MIT-BIH Arrhythmia Database where a QRS complex sensitivity of 99.82% and positive predictivity of 99.83% and a PVC sensitivity of 92.36% and specificity of 95.54% were achieved. The processing speed is measured and the results show that the HW/SW implementation of the algorithm processes the ECG data up to 15 times faster than the SW implementation, meaning that real-time ECG signal analysis is possible at much lower frequencies than in analysis performed in SW. We show that the HW/SW implementation makes it possible to use low-cost FPGA devices with soft-core system systemsmicroprocessors in where a high processing speed is required. systems embedded embedded systems Systems and Software Embedded systems increasingly entail complex issues of hardware–software (HW–SW) co-design. As the number and range of SW functional components typically exceed the finite HW resources, a common approach is that of resource sharing (i.e., the deployment of diverse SW functionalities onto the same HW resources). Consequently, to result in a meaningful co-design solution, one needs to factor the issues of processing capability, power, communication bandwidth, precedence relations, real-time deadlines, space, and cost. As SW functions of diverse criticality (e.g. brake control and infotainment functions) get integrated, an explicit integration requirement need is to car