chap4-1Synthesizer资料.pdfVIP

電信工程學系 National Chiao Tung University Department of Communication Engineering Chap IV Synthesizer Chap IV Synthesizer 1. Single Loop Integer-N Synthesizer – One Modulus Prescaler – Two-Modulus Prescaler 2. Fractional-N Synthesizer – Basic Principle – Fractional Spur – Suppress Fractional Spur – Sigma-Delta Modulator – Higher Order Sigma-Delta Modulator 電信工程學系 National Chiao Tung University Department of Communication Engineering Integer-N Frequency Synthesizer Integer-N Frequency Synthesizer Classic phase lock loop: Integer-N Reference PFD oscillator 1/R Charge Loop VCO Pump Filter Reference Divider 1/N Frequency Divider 電信工程學系 National Chiao Tung University Department of Communication Engineering Features of Single Loop PLL Features of Single Loop PLL 1. Fine Resolution implies: Small Reference fr Small Loop Bandwidth VCO Noise can not be suppressed Slow Switching Time tr=25/fr Wide Change in Dynamical Stability ÷N 電信工程學系 National Chiao Tung University Department of Communication Engineering High Speed PLL High Speed PLL • Limited High Frequency Operation – Speed of Programmable Divider