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Validation and Testing of Design Hardening for
Single Event Effects Using the 8051 Microcontroller
James W. Howard Jr., Senior Member, IEEE , Kenneth A. LaBel, Member, IEEE, Martin A. Carts,
Member, IEEE, Christina Seidleck, Jody W. Gambles, Senior Member, IEEE, and Steven L. Ruggles
Abstract - With the dearth of dedicated radiation hardened NASA the solution it needs to meet stringent science
foundries, new and novel techniques are being developed for performance specifications in a timely, cost-effective,
hardening designs using non-dedicated foundry services. In this
and reliable manner.
paper, we will discuss the implications of validating these
methods for the single event effects (SEE) in the space However, one question still exists: traditional
environment. Topics include the types of tests that are required radiation-hardened devices have lot and/or wafer
and the design coverage (i.e., design libraries: do they need radiation qualification tests performed; what types of
validating for each application?). Finally, an 8051
microcontroller core from NASA Institute of Advanced tests are required for HBD validation?
Microelectronics (IAµE) CMOS Ultra Low Power Radiation
Tolerant (CULPRiT) design is evaluated for SEE mitigative II. TESTING HBD DEVICES CONSIDERATIONS
techniques against two commercial 8051 devices.
Test methodologies in the United States exist to
Index Terms – Single Event Effects, Hardened-By-Design, qualify individual devices through
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