基于概率的RTL模块功耗估算方法.docVIP

A fast RTL Power Estimator for Combinational Circuit 一种快速的组合电路RTL功耗估算器 ZHAO Wen-qing(赵文庆), CUI Ming-dong(崔铭栋) and TANG Pu-shan(唐璞山) (CAD Lab, Electronic Engineering Department, Fudan University, 200433, Shanghai) 复旦大学电子工程系CAD研究室，200433，上海 Abstract：VLSI design is toward much higher level with the development of modern synthesis tools. However, due to the computational complexity problem, gate level power estimators are becoming more and more inapplicable for high level modules. In order to estimate circuit power at the early design stage, RTL power analysis tools are needed. In this paper, we present a fast method to calculate RTL combinational module power. Once the power library is built, we can give the power dissipation of a certain module under stimulation of any input vector. Our method used Taylor’s expansion to establish an equation-based model, and Monte-Carlo simulation is used for library establishment. The result of ISCAS85 benchmark shows that the relative error of our method is within 5%. Key words: RTL, power analysis 摘要：随着现代综合工具的发展，集成电路设计越来越趋向于更高的层次。门级的功耗模拟器由于在计算复杂度上存在的问题，对于高层次模块变得愈加不适用。为了设计初期能在高层次进行功耗估算，我们需要RTL的功耗模拟器。本文提出了一种快速分析组合RTL模块功耗的方法，经过建立模块功耗库，可以非常快的计算出任意输入向量驱动的电路功耗。我们的方法使用泰勒一阶近似的公式模型，并在建库过程中采用Monte-Carlo模拟方法。ISCAS85 benchmark 电路模拟的结果显示，该方法的误差可以在5％以内。 关键字：RTL，功耗分析 1. Introduction It is typically the case that area, speed and reliability are always given more concern in traditional IC design process, however, much larger scale and much faster speed of modern electronic systems has led to a serious of power-related problems which are receiving more concern. Often general-purpose macros developed independently by third-party intellectual property (IP) providers are reused everywhere. In a power-constraint design (such as consumer electronic devices), the power dissipation of high level modules are required to be predicted at early design phase. Thus, tools that allow designer to evaluate power budget during various design phases are in great dema