嵌入式系统硬件设计研究FPGA图形显示系统(本科).docVIP

嵌入式系统硬件设计：FPGA 图形显示系统 摘 要 FPGA（Field－Programmable Gate Array），即现场可编程门阵列，它是在PAL、GAL、CPLD等可编程器件的基础上进一步发展的产物。无论是CRT显示器还是LCD显示器，大多采用VGA接口标准。本设计在基于FPGA的基础上进行VGA接口的嵌入式设计。本文介绍了VGA的图形显示原理，包括VGA接口定义和VGA的扫描方式。图形显示系统包含几个模块：分频模块、显示模块、存储模块和D/A转换模块，其中分频模块和显示模块是本设计需要完成的主要内容。开发板所提供的系统时钟是50MHz，而VGA工业标准给出的标准时钟是25MHz，本设计以VHDL语言为逻辑描述手段，来实现二分频，提供所需的时钟信号。根据VGA工业标准给出行场同步信号的时序要求，用VHDL语言来实现行场同步信号的产生，完成显示模块的设计。在Xilinx公司ISE8.1i软件上进行仿真，给出仿真波形图，包括分频信号、行同步信号、场同步信号和RGB信号。最后在Xilinx Spartan2系列芯片上进行验证，达到彩条的显示效果。 关键词：VGA；FPGA；VHDL；ISE The embedded system hardware design: the FPGA Graphical display system Abstract The FPGA (Field Programmable Gate Array), namely Field Programmable gates Array, it is in the GAL PAL and Programmable devices, CPLD etc. Based on the further development of the product. Whether the CRT display or LCD display, mostly using VGA interface standards. This design based on FPGA based on the design of the interface embedded VGA. The paper introduces the VGA display graphics principles, including the definition and VGA interface scanning mode. Graphic display system contains several modules: frequency module, display module, storage module and D/A conversion module, including frequency and display module is this module design of main contents. Development of the system provided by the board 50MHz clock is given, and the standard industrial standard VGA 25MHz clock is the design, with VHDL language for describing method to realize the logic dichotomy clock frequency, provide signal. According to industry standards for travel field VGA sync signal timing requirements, with VHDL language to carry out of sync signal game, completes display module design. In ISE8.1 Xilinx company software simulation, including wave frequency signal, sync signal, synchronization and RGB signal. At last Spartan2 series Xilinx chip, achieve the effect of the show. Key words: VGA; FPGA; VHDL; ISE目 录 摘 要 I Abstract II 第一章 绪论 1 一、选题背景 1 二、目的及意义 1 三、技术要求和设计范围 2 四、发展现状 2 第二章 设计原理 4 一、FPGA原理 4 二、VGA接口原理 6