ITE布线-电容式触摸屏Sensor内部结构设计规则.pdfVIP

Application Note Title: Layout Guidelines of IT7250/ 7260 Part No.: IT7250/7260 Chip Ver: BX Doc No.: ITAE-AN-09-1-09 Doc Ver: V1.0 Date: June 25, 2010 Confidential Table of Contents 1 IT7250/7260 FPC/PCB Layout Guidelines……………………………………….….2 1.1 Reference circuit…………………………………………………………………2 1.2 Layout guidelines………………………………………………………………...3 2 IT7250/IT7260 ITO Layout Guidelines………………………………………………..6 2.1 Cap. sensor traces and shield signal layout…………………………………..6 2.2 IT7250/IT7260 Support Three Types of ITO sensors……………………8 2.3 ITO with button format………………………………………………………….17 1 1. IT7250/7260 FPC/PCB Layout Guidelines 1.1 Reference circuit (1) The reference circuit of IT7250 is shown in Figure1-1 and 1-2. And the IT7260’s components are the same with IT7250. Figure.1-1 IIC interface R1, R2, R3, and R4: are optional for host address setting If host’s I2C bus has pull up resisters, R6 and R7 can be removed on FPC 2 Fig. 1-2 SPI Interface (2) The recommended component area of FPC is 9 X 9 mm for IT7250 and 12 X 12 mm for IT7260. (3) If the FPC connector still have unused pins, it is recommended to add ground pins to reduce grounding impedance. 1.2 Layout guidelines Capacitance sensor trace (CIN trace) width: 4 mils are recommended. The air gap between each CIN trace and signal which is connected to ITO sensor should be bigger than 4 mils if 4-mils width line is used for each trace. The FPC grounding impedance needs smaller than 3 ohm. The way via a hole is not recommended for capacitance sensor traces. If this way is requir