Chapter 7 InputOutput.ppt

Chapter 7 Input/Output 7.1 External Devices 7.2 I/O Modules 7.3 Programmed I/O 7.4 Interrupt-Driven I/O 7.5 Direct Memory Access 7.6 I/O Channels and Processors 7.7 FireWire Input/Output Problems Wide variety of peripherals external devices Delivering different amounts of data At different speeds In different formats All slower than CPU and RAM Need I/O modules Generic Model of I/O Module I/O Module Diagram External Device Block Diagram External Devices Human readable devices Screen, printer, keyboard Only machine readable devices Monitoring and control Communication Modem Network Interface Card NIC Typical I/O Data Rates Typical I/O Module Functions Control Timing Bus Communication Device Communication Data Buffering Error Detection I/O Steps Overview of I/O steps e.g. Input : CPU checks I/O module device status I/O module returns status If ready, CPU requests data transfer I/O module gets data from device I/O module transfers data to CPU Variations for Output, DMA, etc. I/O Commands CPU issues address Identifies module device if 1 per module CPU issues command Control - telling module what to do e.g. spin up disk Test - check status e.g. power? Error? Read/Write Module transfers data via buffer from/to device Addressing I/O Devices I/O can seem very much like memory access from CPU viewpoint … BUT … it isn’t the same! Each device given unique identifier address CPU’s I/O commands refer to device address, I/O Module design Decisions Tradeoffs: Hide or reveal device properties to CPU? Support multiple or single device? Control device functions or leave for CPU? O/S decisions e.g. Unix treats everything it can as a file I/O Mapping [see next slide] I/O Mapping Memory mapped I/O Devices and memory share an address space I/O access just like memory read/write No special CPU instructions for I/O Large selection of memory access commands Isolated I/O Separate address spaces Need I/O vs. memory select lines on control bus Special CPU instructions fo