时序电路设计分析.pptVIP

  • 9
  • 0
  • 约4.08千字
  • 约 14页
  • 2017-08-14 发布于重庆
  • 举报
时序电路设计分析.ppt

* * Chapter 6 Further design of VHDL   In the previous lessons, we have studied the general design method of the basic digital circuit . We take the MUX and adder as the examples in the analysis of combinational circuit and we talk much about D flip-flop in sequential circuit design too. Today, we will continue discuss the counter design and learn some new syntax. Then we will extend the design based on the counter. The topics such as frequency divider, music circuit, etc, will be concerned. Difficult point: 1.How to control the duration of the output signal? 2.How to adjust the du

文档评论(0)

1亿VIP精品文档

相关文档