FinFETs From Circuit to Architecture.ppt

Power Reduction (ISCAS’85 Benchmarks) Orion-FinFET Extends ORION for FinFET-based power simulation for interconnection networks FinFET power libraries for various temperatures and technologies nodes Power breakdown of interconnection networks for different FinFET modes Power comparison for different FinFET modes under different traffic patterns Router Microarchitecture Pipeline Stages Power Simulation Flow Power Breakdown for SG/LP Modes 4X4 mesh network: 5 ports/router, 48-flit buffer/port Flit width = 128 bits Clock frequency = 1GHz Bulk CMOS vs. LP-mode FinFETs Bulk CMOS simulation: 32