QEMU平台构建基于PowerPC单核SoC 并运行DES程序.ppt

QEMU平台构建基于PowerPC单核SoC 并运行DES程序.ppt

QEMU平台构建基于PowerPC单核SoC 并运行DES程序.ppt

Board ppc405_uc.c文件(QEMU PowerPC 405 embedded processors emulation) DMA DMA controller Timer ppc405_uc.c 文件中有 General purpose timers 该模块和DMA一样定义了接口没有实现功能。 Memory Map * - PowerPC 405EP CPU * - SDRAM (0 * - Flash (0xFFF80000) * - SRAM (0xFFF00000) * - NVRAM (0xF0000000) * - FPGA (0xF0300000) * - GPT (General purpose timers) (0xef600000) * - Serial ports (0xef600300) * - OPB arbitrer (0xef600600) * - IIC controller(0xef600500) * - GPIO (0xef600700) bootloader ram_addr_t ppc405_set_bootinfo (CPUPPCState *env, ppc4xx_bd_info_t *bd, uint32_t flags) { CPUState *cs = CPU(ppc_env_get_cpu(env)); ram_addr_t bdloc; int i, n; /* We put the bd structure at the top of memory */ if (bd-bi_memsize = 0L) bdloc = 0L - sizeof(struct ppc4xx_bd_info_t); else bdloc = bd-bi_memsize - sizeof(struct ppc4xx_bd_info_t); stl_be_phys(cs-as, bdloc + 0x00, bd-bi_memstart); stl_be_phys(cs-as, bdloc + 0x04, bd-bi_memsize); stl_be_phys(cs-as, bdloc + 0x08, bd-bi_flashstart); stl_be_phys(cs-as, bdloc + 0x0C, bd-bi_flashsize); stl_be_phys(cs-as, bdloc + 0x10, bd-bi_flashoffset); stl_be_phys(cs-as, bdloc + 0x14, bd-bi_sramstart); stl_be_phys(cs-as, bdloc + 0x18, bd-bi_sramsize); stl_be_phys(cs-as, bdloc + 0x1C, bd-bi_bootflags); stl_be_phys(cs-as, bdloc + 0x20, bd-bi_ipaddr); for (i = 0; i 6; i++) { stb_phys(cs-as, bdloc + 0x24 + i, bd-bi_enetaddr[i]); } bootloader stw_be_phys(cs-as, bdloc + 0x2A, bd-bi_ethspeed); stl_be_phys(cs-as, bdloc + 0x2C, bd-bi_intfreq); stl_be_phys(cs-as, bdloc + 0x30, bd-bi_busfreq); stl_be_phys(cs-as, bdloc + 0x34, bd-bi_baudrate); for (i = 0; i 4; i++) { stb_phys(cs-as, bdloc + 0x38 + i, bd-bi_s_version[i]); } for (i = 0; i 32; i++) { stb_phys(cs-as, bdloc + 0x3C + i, bd-bi_r_version[i]); } stl_be_phys(cs-as, bdloc + 0x5C, bd-bi_plb_

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