IC Transistors and Resistors.ppt

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IC Transistors and Resistors.ppt

IC Transistors and Resistors Resistor Voltage Coefficient Resistor Voltage Coefficient Resistor Temperature Coefficient Resistor Voltage limits Lateral PNP Saturation Low current NPN/PNP biasing Low current NPN/PNP biasing Low current NPN/PNP biasing MOS Safe Operating Area LV NMOS Hot Carrier Injection Maximum Vds determined from HCI measurements 10% degradation in 10 yrs Transient Vds rating based on 10% duty cycle LV LVT PMOS drain-source leakage Drain-source leakage determines maximum Vds at high temperature Minimum channel length targeted based on process variation and independent SEM measurement DMOS Specific Rdson DMOS Specific Rdson A useful way to extract DMOS series resistance DMOS Clamped Inductive Switching Clamping the flyback voltage below the DMOS breakdown increases energy capability. Power dissipation eventually allows parasitic bipolar to turn on, killing device Energy capability can determine device size * Chris Kendrick Jan. 29, 2003 BiCMOS Design Resistors Bipolar Transistors MOS DMOS Figure 1 A p type region in an n type tub forms the resistor. /knowledge_net/index.html 5.8 NSD – PSD (in PWell) 12 NSD – PHV 17.5 NSD - PWell 30 PSD - Epi 43 NHV - PWell 60 PHV – Epi 95 PWell – Epi 95 Buried Layer – Isolation Breakdown (V) Diffusion The maximum resistor voltage is NOT defined by the tub it’s sitting in! The voltage rating of the tub determines the spacing of PHV to Epi /knowledge_net/index.html What’s the lowest current bipolars can be biased at? Lateral PNP ICmin ~ 5uA PNP (PHV/Epi - Emitter 21x 21 UDR) cross-section Epi Substrate E C PSD FOX PHV NSD PSD PSD PHV B PHV FOX FOX What’s the lowest current bipolars can be biased at? Vertical PNP ICmin ~ 20nA PWell PNPV (PSD/NHV - Emitter 28 x 28 UDR) cross-section Epi Substrate B PSD NHV PSD PSD PHV C PHV E NSD NSD C FOX FOX What’s the lowest current bipolars can be biased at? NPN ICmin ~ 20nA PWell NPN (NSD/PWell - Emitter 21 x 21 UDR) cross-section Epi Substrate E B

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