关于模拟设计的基本考虑.pdfVIP

关于模拟设计的基本考虑 Basic Precautions and Tips that an Analog Designer Should Know. 很多时候，我们在初期设计或者优化电路时，满脑子想的都是性能如何能一 点一点提高，而忽略了所谓的模拟设计的一些基本考虑；待到版图设计时已经晚 矣。那个时候再去修改基本设计无疑是不值得，要么耗费精力，要们前功尽弃。 作为教训，如果我们能够在设计初期，就带着这些基本考虑，那么在选择基本器 件的时候，就会有的放矢，知道一个大概的合理的选取范围，有利于版图设计和 优化。 1. Minimum channel length of the transistor should be four to five times the minimum feature size of the process. We do it, to make the lambda of the transistor low i.e. the rate of change of Id w.r.t to Vds is low. 晶体管最小沟长为工艺最小特征尺寸的4-5 倍，用来减小沟长调制效应。 2. Present art of analog design still uses the transistor in the saturation region. So one should always keep Vgs of the Transistor 30% above the Vt. 目前模拟设计仍然是使晶体管工作在饱和区，故应使Vgs 大于Vt 约30% 。 3. One should always split the big transistor into small transistors having width or length feature size or = 15um. 应把大管分成小晶体管，使其宽/长特征尺寸或=15um 。 4. W/L Ratio of transistors of the mirror circuit should be less than or equal to 5, to ensure the proper matching of the transistors in the layout. Otherwise, it results to the Systematic Offset in the circuit. 电流镜电路的晶体管的w/l 比应小于或等于5，以保证较好的Matching,否则 会有系统失调。 5. One should make all the required pins in the schematic before generating the layout view. Because it’s difficult to add a pin in the layout view. All IO pins should be a metal2 pins whereas VDD and Ground should be metal1 pins 在电路中画出所有的管脚（pin ），之后才作layout 。因为在layout 中增加一 个pin 是比较困难的。所有的IO pin 应该用metal2 pin ，VDD 和GND 用metal1 。 6. One should first simulate the circuit with the typical model parameters of the devices. Since Vt of the transistor can be anything between Vt(Typical) -/+ 20%. So we check our circuit for the extreme cases i.e. Vt+20%, Vt-20%. A transistor having Vt-20% is called a fast transistor and transistor having Vt+20% is called slow transistor. It’s just a way to differentiate them. So with these fast and