AreaOriented Synthesis for PassTransistor Logic.pdfVIP

Area-Oriented Synthesis for Pass-Transistor Logic  Rajat Chaudhry Tai-Hung Liu Adnan Aziz Jeffrey L. Burns Electrical and Computer Engineering IBM Austin Research Laboratory The University of Texas, Austin IBM Corporation chaudhry,tlliu,adnan@ jbl@ Abstract 1.1 Past work Pass Transistor Logic (PTL) circuits have been successfully used Most published research on PTL has consisted of designers describ- to implement digital ICs which are smaller, faster, and more en- ing the relative quality of hand-crafted PTL and CMOS implemen- ergy efficient that static CMOS implementations of the same de- tations of logic functions: [23, 11, 15, 19]. There have been a num- signs. Thus far, most PTL implementations have been handcrafted; ber of attempts developing synthesis tools targeting PTL. We briefly as such, designer acceptance of PTL has been limited. In this describe past efforts, paying particular attention to their strengths paper, we develop efficient algorithms for automated synthesis of and shortcomings. high quality PTL designs. Our approach is based on the use of Bi- A top-down design flow for pass-transistor logic, called LEAP nary Decision Diagrams (BDDs) to represent logic functions . We (Lean Integration with Pass Transistors), was proposed in [22]. present several BDD optimization techniques targeting minimum In this scheme a logic design in HDL form was synthesized by area PTL implementations. We compare our results with prior work