2.LayoutDesignforAnalogCircuits-IITBombay.pptVIP

GENERAL CONSIDERATIONS IN LAYOUT DESIGNMain issues? Component interconnections ? Effects of parasitics? Physical accessibility of components ? Power dissipation Subtopics 1.1 Parasitic effects1.2 Supply conductors1.3 Component placement 1.1 Parasitic Effects R L of conductor tracksC between conductor tracksResistanceResistance of 35 μm thickness, 1 mm wide conductor = 5 m?/cmChange in Cu resistance with temperature = 0.4% / °CCurrent carrying capacity of 35 μm thickness Cu conductor (for 10 °C temperature rise): Width (mm) 1 4 10 Ic (A) 2 4 11 1.2 Supply ConductorsUnstable supply ground due to? Resistive voltage drop? Voltage drop caused by track L and high freq. current? Current spikes during logic switching ? local rise in ground potential fall in Vcc potential ? possibility of false logic triggering.Solutions? Conductor widths : W (ground) W (supply) W(signal)? Ground plane? Track configuration for distributed C between Vcc ground? Analog digital ground (supply) connected at the most stable point 1.3 Component Placement  ? Minimize critical conductor lengths overall conductor length ? Component grouping according to connectivity ? Same direction orientation for similar components ? Space around heat sinks ? Packing density ? Uniform ? Accessibility for  ? adjustments ? component replacement ? test points ? Separation of heat sensitive and heat producing components  ? Mechanical fixing of heavy components 2. LAYOUT DESIGN FOR ANALOG CIRCUITS? Supply and ground conductors ? Signal conductors for reducing the inductive and capacitive coupling ? Special considerations for  ? Power output stage circuits  ? High gain direct coupled circuits  ? HF oscillator /amplifier  ? Low level signal circuits  2.3 Circuits with High Power O/P StageResistance due to track length solder joints ? modulation of Vcc GND and low freq. oscillations ? Large decoupling capacitors ? Separate Vc