a novel bus transfer mode (as transfer) and a performance evaluation methodology：一种新型的总线传输模式（如传输）和性能评估方法.pdfVIP

INTEGRATION, the VLSI journal 52 (2016) 23–33 Contents lists available at ScienceDirect INTEGRATION, the VLSI journal journal homepage: /locate/vlsi A novel bus transfer mode (AS transfer) and a performance evaluation methodology Xiaokun Yang, Nansong Wu n, Jean H. Andrian Department of Electrical and Computer Engineering, Florida International University, 10555 West Flagler St., FL 33174, USA a r t i c l e i n f o a b s t r a c t Article history: This paper proposes an innovative on-Chip bus transfer mode – the Advanced Encryption Standard (AES) Received 9 February 2015 state transfer (AS) and a performance evaluation methodology to estimate the transfer performance. By Received in revised form modeling and collecting several performance metrics including bus latency, bandwidth, valid band- 21 July 2015 width, power and energy consumption using the methodology, it enhances fidelity of the performance Accepted 22 July 2015 analysis and evaluation. As a case study, we formally complete the hardware implementation flow on Available online 30 July 2015 Advanced High-Performance Bus (AHB), Advanced eXensible Interface 4 (AXI4) and AS bus (ASBUS) Keywords: DMA, and demonstrate high estimation accuracy by comparing all the experimental results. Both static AES analysis and hardware implementation results show that the data transfer lat