-编码器+三态门chenyu分析报告.pptVIP

Class exerciserealize the logic function F with 3-to-8 decoder and logic gates. Answer Key 1realize the logic function F with 3-to-8 decoder and logic gates. Answer Key 2 realize the logic function F with 3-to-8 decoder and logic gates. Answer key for example 1 Review of Last Class Decoder 74X138 74X139 Cascading Binary Decoders BCD Decoder Seven-Segment Decoders The 74x139 Dual 2-to-4 Decoder Seven-Segment Decoders 6.5 Encoder ENCODER (P408) If the device’s output code has fewer bits than the input code, the device is usually called an encoder. Probably the simplest encoder to build is a 2n-to-n or binary encoder. encoder（编码器） encoder （编码器） encoder （编码器） If multiple requests can be made simultaneously , how can the encoding device decide which? The solution is to assign priority to the input lines, so that when multiple requests are asserted, the encoding device produces the number of the highest-priority requestor. Such a device is called a priority encoder. (P408) 6.5.1 Priority Encoders (P410 ) (优先编码器) Logic symbol for a generic 8-input priority encoder. 6.5.2 The 74x148 Priority Encoder (P411) The 74x148 is a commercially available, MSI 8-input priority encoder. The EO_L signal is an enable output designed to be connected tothe EI_L input of another ’148 that handles lower-priority requests. (P412) Two 74x148 cascaded to handle 16 requests. 6.6 Three-State Devices (三态缓冲器) 6.6 Three-State Devices (三态缓冲器) (P418) 6.6 Three-State Devices (三态缓冲器) (P418) 三态缓冲器（三态驱动器） Typical three-state devices are designed so that they go into the Hi-Z state faster than they come out of the Hi-Z state. 6.6.2 Standard SSI and MSI Three-State Buffers 74X574 74X245 Class exercise (P 514) 6.47 6.52, 6.53, 分析判定优先级电路：（利用74x148 ） 8个___电平有效输入I0_L～I7_L，_____的优先级最高 地址输出A2