数字逻辑10-1n.pptVIP

* * Chapter 9 Memory Address decoder ROM and RAM CPLD and FPGA Memory Construct with a binary decoder and a memory array ! Address decoder in Memory Constructed with small decoders! Multi-dimensional decoders ! Address decoder in Memory Read only memory (ROM) Mask ROM: use a diode or transistor as memory connection. The data can only be write in the manufacture process, can not be changed by the users ! P-ROM: Programmable , add a fuse to the device. The fuse can be melted by the user to write “0” ! Read only memory (ROM) EPROM: Erasable PROM ,use floating-gate technology. Include EEPROM and FLASH . The floating gate can be charged to write “0” and uncharged to write “1” ! Read only memory (ROM) Random access memory (RAM) Use memory device to store data bit, and use word line to control its input/output from bit line . Static RAM (SRAM) The memory device is a latch ,the data is stable, and the access time is short, but the circuit is complex and expensive ! Dynamic RAM (DRAM) The memory device is capacitor Very simple, high density; The output signal is very weak , a sense amplifier is needed; The data stored need to refresh periodically ! Memory IC: ROM If there are N address input, 2N word can be stored; CS and OE port can be used for expand the memory. Memory IC: RAM Use WE port to control data input/output ! Memory Data bits are stored in a structured way Once a word line is selected, all the bits in this line can be in output through the bit lines ! Example: When a2a1a0= 000, y4y3y2y1= 1000; When a2a1a0= 101, y4y3y2y1= 0110; Memory Programable logic device A truth table is stored in the memory array ! Each bit line is a function output ! Example: Programable logic device FPGA : Look up table (LUT) Programable logic device Complex PLD :CPLD