基于FPGA的高精度数字频率计设计详解.docVIP

大连海事大学 毕 业 论 文 　 　　 二○一四年六月 基于FPGA高精度数字频率计设计 专业班级：通信工程3班 姓 名： 程胜胜 指导教师： 谭克俊 信息科学技术学院摘 要 频率计是一种应用非常广泛的电子仪器，也是电子测量领域中的一项重要内容，而高精度的频率计的应用尤为广泛。 本论文首先简单介绍了EDA技术原理和QuartusⅡ开发软件的操作方法，接着论述了三种常见的测频方法，选用其中的等精度测频法实现了高精度测频的目的。本设计分为硬件设计和软件设计，其中软件设计部分采用VerilogHDL编写，分为波形计数模块，数据处理模块和频率值结果显示模块，各个模块程序均通过了时序仿真验证和功能仿真验证，再利用顶层文件将所有模块连接起来，拼接成一个整体。模块划分的设计具有相对独立性，可以对模块单独进行设计、调试和修改，缩短了设计周期。此次设计的硬件实现环境是SmartEDA实验箱。本论文对测频系统的设计流程、模型的建立和仿真做出了具体详细的研究，验证了该系统的正确性。 本系统采用了 FPGA来实现高精度数字频率计设计。除复位键输入部分和LED显示部分以外，其余全部在一片 FPGA芯片上实现，整个系统非常精简，而且具有灵活的现场可更改性。 关键词：VerilogHDL；数字频率计；EDA；FPGA Abstract Frequency meter is a kind of electronic instrument applied widely. A kind of high-accuracy digital frequency meter is designed based on FPGA in this paper. This paper first introduces the method of operation principle of EDA technologyand Quartus II software, then introduces three kinds of common frequency measurement method, the selection of the precision frequency measuring methodachieves high precision frequency measurement purpose.The design is divided into hardware design and software, the software design part uses the VerilogHDL compilation, divided into waveform counting module, data processing module and the frequency value result display module, each module program through the timing simulation and functional simulation, the top-level documents connect all modules, spliced into a whole.Design module is relatively independent, can carry on the design, debug and modify the module separately, shorten the design cycle. The design of thehardware environment is the SmartEDA experiment box. Establishment and Simulation of the design process, the frequency measurement system model isstudied in detail in the paper, the system has been proved right. The system uses FPGA to realize the high precision digital frequency meter design. In addition to the reset key input and LED display part outside, the rest allin the realization of a FPGA chip, the whole system is very compact, and flexible change