ch05Computer Organization计导.ppt

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ch05Computer Organization计导

Chapter 5;;;Figure 5-1;;Key terms;Key terms;Key terms;Key terms;CENTRAL PROCESSING UNIT (CPU);Figure 5-2;The arithmetic logic unit(ALU) performs arithmetic and logic operations.;Registers are fast stand-alone storage locations that hold data temporarily.;Controlling is achieved through wires that can be on or off. ;MAIN MEMORY;Key terms;Key terms;Key terms;Key terms;Figure 5-3;Table 5.1 Memory units;Memory addresses are defined using unsigned binary integers. ;Example 1;Example 2;Two types of memory : RAM and ROM. RAM(random access memory): (1)RAM can be read from and written to by the user. (2)RAM is volatile. SRAM(static RAM):flip-flop gates, no need for refreshing. DRAM(dynamic RAM):capacitor.need to be refreshed periodically.;ROM:(Read-only memory) (1)The user is allowed to read but not write to ROM. (2)ROM is nonvolatile. PROM: EPROM: EEPROM:;Figure 5-4;Figure 5-5;INPUT / OUTPUT;Key terms;Key terms;Key terms;Key terms;Key terms;Key terms;Key terms;Input/Output devices can be divided into two broad categories:nonstorage and storage devices. Nonstorage devices allow the CPU/memory to communicate with the outside world but they can not store information.;Storage devices, although classified as I/O devices, can store large amounts of information to be retrieved at a later time. We categorize them as either magnetic or optical.;Magnetic Storage Devices;;Figure 5-6;Figure 5-7;Figure 5-8;Figure 5-9;CD-ROM CD-R CD-RW DVD ;Table 5.2 CD-ROM speeds;Table 5.3 DVD capacities;SUBSYSTEM INTERCONNECTION;Key terms;Key terms;Key terms;Figure 5-14;Figure 5-15;Controllers or interface:can be a serial or parallel device. A serial controller has only one wire connection to the device. A parallel controller has several connections to the device so that several bits can be transferred at a time.;Figure 5-16;Figure 5-17;Figure 5-18;Figure 5-19;Figure 5-20;PROGRAM EXECUTION;Key terms;Key terms;Figure 5-21;Figure 5-22;Figure 5-23.a;Figure 5-23.b;Figure 5-23.c;Figure 5-23.d;Figure 5-

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