数字集成电路可测性设计及验证方法学ppt.ppt

* 共102页 * PrimeTime脚本— source pt.scr set_operating_conditions -min_library scc65nll_hs_rvt_ff_v1p32_-40c_basic -min ff_v1p32_-40c -max_library scc65nll_hs_rvt_ss_v1p08_125c_basic -max ss_v1p08_125c -analysis_type bc_wcset_operating_conditions -library scc65nll_hs_rvt_ff_v1p32_-40c_basic ff_v1p32_-40c create_clock -name clk -period 300 -waveform [list 0 150] clk_in_pad set_clock_latency 2.0 [all_clocks] set_clock_uncertainty -setup 2.0 clk set_clock_transition 2 [get_clocks clk] set_drive 0 [list clk clk_in_pad ] set_driving_cell -library SP65NLLD2RP_OV3_TTM_V0p2_ss_V1p08_125C -lib_cel