lesson 14 IO interrupt.ppt

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lesson 14 IO interrupt

I/O Interrupts I/O 中断 vocabulary * * Lesson Fourteen 中断屏蔽 interrupt mask 临界区 critical section 响应时限 response deadline 等待时间 latency 带宽 bandwidth 寄存器 register 菊花链 daisy-chained 三态门 tri-state gates 上拉电阻 pull-up resistor 集电极开路的 open collector 触发器 flip-flop 中断服务程序 interrupt service routine 握手信号 handshake signals 异常处理 exception handling 查询,检测 polling An interrupt request is synchronized by handshake signals, called ireq and iack in the SRC machine. An I/O device asserts ireq, and when the processor completes the current instruction, it responds by asserting iack, provided that interrupts are enabled. 中断请求通过握手信号同步,在SRC机器中,握手信号为中断请求和中断确认信号。一个I/O设备发送中断请求信号,如果允许该中断发生,当处理器完成当前指令后以中断确认信号响应该中断。 SRC Simple RISC Computer Since several devices may request interrupts, ireq is usually a wired OR signal, and its bus wire usually active low. On receiving an acknowledge, a device must identify itself to the processor so that the correct software routine, called an interrupt handler, or interrupt service routine (ISR) can be executed. 既然多个设备都可以请求中断,中断请求信号通常是线或信号且低电平有效。一个设备在接收到确认信号后必须告知处理器自身的设备编号使处理器可以执行正确的中断处理程序或中断服务程序(ISR)。 In most systems a small integer called a type code is put on the processor data lines and converted to an address by the processor. The address of the interrupt handler will be found at the location pointed to by the converted type code. In SRC this is done by having the I/O device send the processor 8 bits from which an interrupt vector address can be formed. SRC also allows for different interrupts to be served by the same handler by having the device send 16 additional information bits that are placed in the II register. 在大多数系统中一个称为类型码的小整数被放到处理器的数据线上并被处理器转换为地址。中断处理程序的地址位于被转换的类型码指向的位置。在SRC中I/O设备向处理器发送8位类型码,该类型码形成中断向量地址。通过在寄存器II中发送一个16位的信息字,SRC也允许同一处理程序响应不同的中断。 A device with interrupt capability will have an interrupt request flip-flop that is often set by the same condition that sets the ready status flag. It will also have an interrupt enable flip-flop

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