ch03-1 Single-Stage Amplifiers.ppt

Chapter 3Single-Stage Amplifiers Questions Why？ Circuit Model Some definition 直流偏置：决定管子的工作点 交流信号输入：影响输出摆幅 大信号模型（LSM） 小信号模型（SSM）：将直流电压源短路，电流源开路 输入阻抗Rin：端接负载，输入端接测试电压源测电流或接测试电流源测电压 输出阻抗Rout：输入端口电压源短路，电流源开路，在输出加测试电压源或电流源，测相应的电流和电压值 Analog Design Linearity Common Source with resistor load Common Source Common Source Common Source (cont.) Common Source (cont.) Design Tradeoffs Design Tradeoffs If ID and W/L are kept constant, and we increase RD, then VDS becomes smaller. Operating Point gets closer to the borderline of Triode Mode. It means – less “swing” (room for the amplified signal) Design Tradeoffs If ID decreases and W/L and VRD are kept constant, then we must increase RD Large RD consumes too much space, increases the noise level and slows the amplifier down (time constant with input capacitance of next stage). Common Source Tradeoffs Larger RD values increase the influence of channel-length modulation (ro term begins to strongly affect the gain) Common Source Maximum Gain CS Amplifier With RD – Simple “hand-calculations” CASE 1: If we keep ID=const and RD=const (assume λ=0) Increasing W/L by a factor of α necessitates decrease of VG-VTH by a factor of α1/2 (for consistency of Current Equation) Gain (through gm) increases by α1/2 That means that we can “squeeze” a little more further gain, by slightly increasing RD (if VG-VTH decreases, then we can decrease VDS by the same amount). CS Amplifier With RD – Simple “hand-calculations” CASE 2: If we keep VG =const (assume λ=0) Increasing W/L by a factor of α causes ID to increase by the same factor. Gain (through gm) increases by α (if RD is unchanged) However: Must decrease RD if we don’t want swing to reduce a lot, unless VDD can be increased. CS Amplifier with Diode-Connected Load “Diode-Connected” MOSFET is only a name. In BJT if Base and Collector are short-circuited, then the BJT acts exactly as a diode. CS Amplifier with Diode-Connected Load We want to replace RD with a MOSFET that will operate like a small