quartusII设计16位加法器.doc

Exercise 1a Objectives: Build a 16-bit adder using the ‘+’ operator Practice coding ENTITY-ARCHITECTURE structure See the effect of libraries references on compilation Step 1: Unzip the exercise files and open a Quartus II project Unzip the lab project files, if necessary. In an Windows Explorer window, go to the directory C:\altera_trn\VHDL. (If you see a subfolder already there named Introduction_to_VHDL_91, please delete.) Double-click the executable file named Introduction_to_VHDL_9_1_v1.exe found in the C:\altera_trn\VHDL directory. If you still cannot find this directory or file, ask your instructor for assistance. After double-clicking, in the WinZip dialog box, simply click Unzip to automatically extract the files into a newly created folder named Introduction_to_VHDL_91. Close WinZip. Start the Quartus II software. In the Windows Start menu from the All Programs list, go to the Altera folder and then the Quartus II 9.1 folder. Click Quartus II 9.1 (32-Bit) to start the program. There may also be a shortcut on the desktop. If using another operating system, please ask the instructor how to open the Quartus II software if you are unsure. Open the adder project. From the Quartus II File menu, choose Open Project. Browse to the directory C:\altera_trn\VHDL\Introduction_to_VHDL_91\lab1a and select the file adder.qpf. The project opens and you are ready to start coding your adder block. Step 2: Write the code for a 16-bit adder Create a VHDL file using the Quartus II text editor. From the Quartus II File menu select New or click on the button. The New File dialog box will appear; select VHDL File. Click OK. Write the source code for a 16-bit adder using the ‘+’ operator. Use the following information as a guide: Use the names in the diagram above to name your block and its ports (all lower-case) All inputs and outputs should be declared as standard logic. Do not worry about rollover with this adder. This adder is already wide enough to a