Functional Simulation with the NCSim.docVIP

Performing a Functional Simulation with the NCSim Software /support/software/nativelink/simulation/ncsim/eda_pro_ncsim_func_sim.html You can use the Cadence NCSim software to perform a functional simulation of a VHDL or Verilog HDL design that contains Altera-specific components: ? To perform a functional simulation of a Verilog HDL design with the NCSim interface: If you have not already done so, set up the NCSim working environment. Start the NCSim software by typing nclaunch? at a command prompt. To create a work directory, on the Edit menu, point to Add, and then click New Library and type the name of the work library in the Library box. Note: Altera recommends using the NCSim (NC-Verilog or NC-VHDL) default library names when you create a library. You should name the NCSim software libraries as follows: When you run the NCSim software independently from the Quartus?II software, you should name your library work. When you run the NCSim software automatically from the Quartus II software to perform a gate level simulation, your library is automatically named gate_work under the current project directory, and the work alias is mapped to the gate_work directory. Copy the cds.lib and hdl.var files, which are located in the /NCSim installation directory path/tools/inca/files/ directory, to the /project directory/simulation/ncsim directory. Edit the cds.lib and hdl.var files as follows: File Name File Contents Function cds.lib DEFINEwork library./work Maps the work library to the physical location of the work library. hdl.var DEFINE WORKwork library Maps the NCSim variable WORK to the work library. ? To compile the appropriate project files and libraries into the work library: Click Sim Compiler. In the File box, type in the path of the test bench file (if you are using one). In the Work Library list, select the work library. Click OK. Repeat steps 7a through 7d to compile the Sim Design File (.v) for the project and the appropriate functional simulation li