09_Arithmetic.pptVIP

William Stallings Computer Organization and Architecture7th Edition Chapter 9 Computer Arithmetic Arithmetic Logic Unit Does the calculations Everything else in the computer is there to service this unit Handles integers May handle floating point (real) numbers May be separate FPU (maths co-processor) May be on chip separate FPU (486DX +) ALU Inputs and Outputs Integer Representation Only have 0 1 to represent everything Positive numbers stored in binary e.g. 41No minus sign No period Sign-Magnitude Two’s compliment Sign-Magnitude Left most bit is sign bit 0 means positive 1 means negative +18 = -18 =Problems Need to consider both sign and magnitude in arithmetic Two representations of zero (+0 and -0) Two’s Compliment +3 =+2 =+1 =+0 = -1 = -2 = -3 =Benefits One representation of zero Arithmetic works easily (see later) Negating is fairly easy 3 =Boolean complement givesAdd 1 to LSB Geometric Depiction of Twos Complement Integers Negation Special Case 1 0 = Bitwise not Add 1 to LSB +1 Result 1Overflow is ignored, so: - 0 = 0 ? Negation Special Case 2 -128 = bitwise not Add 1 to LSB +1 Result So: -(-128) = -128 X Monitor MSB (sign bit) It should change during negation Range of Numbers 8 bit 2s compliment +127 == 27 -1 -128 == -27 16 bit 2s compliment +32767 = 011111111= 215 - 1 -32768 = 100000000= -215 Conversion Between Lengths Positive number pack with leading zeros +18 = +18 =00010010 Negative numbers pack with leading ones -18 = -18 =10010010 i.e. pack with MSB (sign bit) Addition and Subtraction Normal binary addition Monitor sign bit for overflow Take twos compliment of substahen