(内存基本知识)_4_DRAM工作原理.pptVIP

* * In this example, we are showing a six-transistor circuit. The basic storage element of SRAM is a 6-transistor circuit provided by cross-coupled inverters. This configuration will Hold a 1 or 0 as long as the system continues to receiver power. Addressing is simple. * High capacity is due to an extremely efficient memory element. DRAM cell consist of a single access transistor and a capacitor. More complicated addressing scheme. * Refresh means the memory elements must be read and written back to their storage location. Since we need a refresh cycle, an external memory controller