GNR-supremjack 3.doc

Fabrication and Electrical Characterization of Graphene Nanoribbon and Graphene Nanoelectronics Devices Project proposal by Suprem Ranjan Das Jack Chung Department of Physics Purdue University, West Lafayette, IN ABSTRACT Since last five years, single and multi layer graphene have shown promising interests in a variety of applications such as electrical, mechanical, thermal, and chemical to name few. However, (ideally) owing to the absence of a bandgap in case of single layer graphene and/or (practically) a very small bandgap induced by the substrates [1], the FET-device metrics are not comparable to that of traditional MOSFETs. Recent developments have established the appearance of bandgap by fabrication of the nanoribbons of the single layer carbon atom sheets. However, it has not been demonstrated yet now to fabricate and position the nanoribbons in a way it is wanted on a wafer scale. Here we propose a method in which one can fabricate and position the graphene nanoribbons (GNRs) as wanted on a wafer scale basis and following the standard CMOS fabrication techniques GNR devices can be made out of it. Also this method can be used to make nanoribbon circuits on flexible, bendable and stretchable substrates. Single layer as well as multilayer GNRs and their devices can be developed using this method. This work could be a way of realizing graphene nanoelecrtonics. The fabrication of nanoribbons and positioning them in particular places on a wafer can be thought of as an extension work of the recently reported growth of graphene by Zheng et al using limited source CVD and wafer scale transfer by Youngbin Lee et al [2, 3]. INTRODUCTION Graphene, the unzipped form of carbon nanotubes is the recently discovered allotrope of carbon that has gained tremendous amount of scientific as well as technological interests [4]. It has provided the playground for demonstrating phenomena observed in high energy physics yet in condensed