信息科学与电子工程专业英语Lecture02.ppt

信息科学与电子工程专业英语Lecture02

* These design steps (or flow) are also common to standard product design. The significant difference is that Standard Cell design uses the manufacturer’s cell libraries that have been used in hundreds of other design implementations and therefore are of much lower risk than full custom design.9 这些设计步骤(或流程)对于标准产品设计同样适用。重要的差别在于标准单元设计使用制造商的单元库,这些库已用于数以百计的其它设计实现,因而比起全定制设计来风险小得多。 Unit 2-2 专用集成电路(ASIC) —— 标准单元设计 * Gate array design is a manufacturing method in which the diffused layers, i.e. transistors and other active devices, are predefined and wafers containing such devices are held in stock p

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