东南大学Intel微处理器ch15_课件.pptVIP

USB USB NRZI (non-return to zero, inverted) USB sync bits using a method called bit stuffing transmitted beginning with the least-significant bit first, followed by subsequent bits. If a logic 1 is transmitted for more than 6 bits in a row, the bit stuffing technique adds an extra bit (logic 0) after six continuous 1s in a row. USB commands used to transfer data and select the receptor sync byte (80H) packet identification byte (PID). two types of CRC (cyclic redundancy checks) 5-bit 16-bit The latest addition to most computer systems was the inclusion of the accelerated graphics port (AGP) The main advantage of the AGP bus over the PCI bus is that the AGP can sustain transfers (using the 8X compliant system) at speeds up to 2G bytes per second. AGP * * * * * * * * * * * * * * * * * * * Title Chapter 15 Bus Interface ISA Bus The Industry Standard Architecture (ISA) bus was the first I/O bus found on the original PC. This bus operated at 8 MHz and was 8-bits wide. Through enhancement it was increased to a 16-bit bus. Although seldom found in personal computers, it is still found in industrial applications and probably will remain in them for years to come. the loading to the ISA bus be kept to one low-power (LS) TTL load must provide ground to the outside world, or else the TTL data on the parallel ports are useless FIGURE 15–5 The 16-bit ISA bus. (a) Both 8- and 16-bit connectors and (b) the pinout of the 16-bit connector. PCI Bus virtually the only bus found in the newest Pentium 4 systems and just about all the Pentium systems plug-and-play characteristics 64 BITS DATA BUS connects to the PCI bus through an integrated circuit called a PCI bridge FIGURE 15–6 The system block diagram for the personal computer that contains a PCI bus. PCI bus functions with either a 32-bit or a 64-bit data bus and a full 32-bit address bus the address and data buses are multiplexed to reduce the size of the edge connector(AD0~AD63) 94 Pins PCI Bus PCI Bus contains a 256-byte conf