ppt课件-testinginthefourthdimension-auburnuniversity.pptVIP

Copyright 2001, Agrawal Bushnell VLSI Test: Lecture 4 Lecture 4Yield Analysis and Product Quality Yield and manufacturing cost Clustered defect yield formula Defect level Test data analysis Example: SEMATECH chip Summary VLSI Chip Yield A manufacturing defect is a finite chip area with electrically malfunctioning circuitry caused by errors in the fabrication process. A chip with no manufacturing defect is called a good chip. Fraction (or percentage) of good chips produced in a manufacturing process is called the yield. Yield is denoted by symbol Y. Cost of a chip: Clustered VLSI Defects Yie