Intel的_Romley_Platform.pptVIP

* Intel Romley Platform * Agenda Romley Platform Overview Intel Sandy Bridge Overview Intel Sandy Bridge I/O Interface Patsburg PCH I/O Interface * QPI QuickPath Interconnect CSI Common System Interface PCH Platform Controller Hub MCH Memory Controller Hub IOH Input Output Hub ICH I/O controller hub DMI Direct Media Interface SUC Storage controller unit * The Development Process of Intel Server Platform * Romley Platform Overview Two-chip platform(CPU and PCH) - traditional three-chip platforms(CPU, Memory Controller and I/O Controller) Consist of Romley-EP,Romley-EX and Romley-EN platform - Sandy Bridge-EP, Sandy Bridge-EX or Sandy Bridge-EN processors with Patsburg PCH This family of processors includes an integrated memory controller (IMC) and integrated I/O (IIO) (such as PCI Express* and DMI2) on a single silicon die * Designed for Entry Level servers Sandy Bridge-EN Processor on the 2 Socket Romley-EN Platform * Sandy Bridge-EP Processor on the 2 Socket Romley-EP Platform Designed for Efficient Performance server, workstation and HPC platforms * Sandy Bridge-EX Processor on the 4 Socket Romley-EX Platform Nehalem and Sandy Bridge 1 socket system * Nehalem and Sandy Bridge 2 socket system * Nehalem and Sandy Bridge 4 socket system * * SPEC of Sandy Bridge Codename Market Cores (Threads) Socket TDP Sandy Bridge-EX 4P server 8 (16) Socket R (LGA 2011)? 150/130/95/80/80 W Sandy Bridge-EP 1-2P server 8 (16) Socket R (LGA 2011) 150/130/95/80/80 W 6 (12) 4 (8) Sandy Bridge-EN 1-2P server 8 (16) Socket B2 (LGA 1356) 95/80/80 W 6 (12) 4 (8) 2 (4)   * SPEC of Sandy Bridge Codename Chipset interface Peak memory bandwidth Peak memory capacity PCI Express lanes L2 cache (per core) L3 cache (total) Integrated GPU cores Release Sandy Bridge-EX 2x QPI 51.2 GB/s 12 DIMM/socket 40 (v3.0) 256 KB 20 MB None Q4 2011 Sandy Bridge-EP 2x QPI 51.2 GB/s 12 DIMM/socket 40 (v3.0) 256 KB 20 MB None Q3 2011 Sandy Bridge-EN 1x QPI 38.4 GB/s 6