Review of Chapter 3 Electronic Behavior of CMOS Circuits Logic Voltage Levels (逻辑电压电平) DC Noise Margins (直流噪声容限) Fan-In(扇入) Fun-Out (扇出) Review of Chapter 3 Transmission Gates (传输门) Schmitt-Trigger Inputs (Hysteresis) Three-State Outputs (Tri-State output) Open-Drain Outputs (Open-Collector Gate) Review of Chapter 3 Logic Levels CMOS(0-1.5V, 3.5-5V) TTL(0-0.8V, 2-5V) ECL(L=-1.8V, H=-0.9V) (L=3.6V, H=4.4V) Review of Chapter 3 Wired AND (线与) Open-Drain Outputs (Open-Collector Gate) Wired OR (线或) Emitter-Coupled Logic Gate (ECL, 发射极耦合逻辑门) Review of Chapter 3 (第三章内容回顾) Three kinds of Description Method (三种描述方法): Truth Table (真值表) Logic Expression (逻辑表达式) Logic Circuit (逻辑符号) NAND and NOR (与非和或非) 4.1 Switching Algebra (开关代数) 4.1.1 Axioms (公理) X = 0 , if X ? 1 X = 1, if X ? 0 0’ = 1 1’ = 0 0·0 = 0 1+1 = 1 1·1 = 1 0+0 = 0 0·1 = 1·0 = 0 1+0 = 0+1 = 1 4.1.2 Single-Variable Theorems(单变量开关代数定理) Identities (自等律):X + 0 = X X · 1 = X Null Elements (0-1律):X + 1 = 1 X · 0 = 0 Involution (还原律):( X’ )’ = X Idempotency(同一律):X + X = X X · X = X Complements(互补律):X + X’ = 1 X · X’ = 0 4.1.3 Two-and Three-Variable Theorems (二变量或三变量开关代数定理) Similar Relationship with General Algebra (与普通代数相似的关系) Commutativity (交换律) A · B = B · A A + B = B + A Associativity (结合律) A·(B·C) = (A·B)·C A+(B+C) = (A+B)+C Distributivity (分配律) A·(B+C) = A·B+A·C A+B·C = (A+B)·(A+C) Notes (几点注意) 不存在变量的指数 A·A·A ? A3 允许提取公因子 AB+AC = A(B+C) 没有定义除法 if AB=BC ? A=C ?? Some Special Relationships(一些特殊的关系) Covering (吸收律) X + X·Y = X X·(X+Y) = X Combining (组合律) X·Y + X·Y’ = X (X+Y)·(X+Y’) = X Consensus [添加律(一致性定理)] X·Y + X’·Z + Y·Z = X·Y + X’·Z (X+Y)·(X’+Z)·(Y+Z) = (X+Y)·(X’+Z) 4.1.4 n-Variable Theorems (n变量定理) Generalized idempotency theorem ( 广义同一律 ) X + X + … + X = X
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