IntroductionofIPGenerator.pptVIP

Introduction of IP Generator Speaker : Peng Chen Chi OUTLINE Introduction Behavioral Level IP ADD/SUB IP Generator Viterbi Decoder IP Builder Reed-Solomon Code Generator FFT IP Generator Conclusion Introduction What is IP ? Intellectual Property (IP):Intellectual property means products, technology, software, etc.that have been protected through patents, copyright, or trade secrets. Introduction(cont.) The electronic industry is moving toward the design and implementation of entire systems on a single chip (SoC). Three types of reusable core (IP Core) can be distinguished The Soft Core is described using a high level description language (i.e. VHDL or Verilog), The Firm Core is described and synthesized for specific library and finally The Hard Core is described at the layout level. Behavioral Level IP We can define a set of objective criteria for a Behavioral- Level IP (BL-IP) that guarantees the performances of the block: Blocks models must be uniform. This enables the extraction of generic parameters and rules to define and compare different implementations of functions. BL-IP overhead development cost must be reasonable. Flexibility is an important characteristic for BL-IP. The environmental adaptation of BL-IP is done by setting a set of parameters BL-IP performance have to be tool independent. This criterion introduces the concept of Universal High- Level-Synthesis (U-HLS) tool. To reach these goals, we propose to use an interface called a generator and to specify the IP at the behavioral level associated to the use of a methodology to simplify the IP integrator task. Definition of IP Parameters IP parameters have three different levels of abstraction: Algorithm selection parameters Integrator parameters and constraints. Synthesis tool parameters. Parameters can interact with another from a different level, and can be defined by enumerations or bounds. IP Generator General Architecture The inter