LDO设计讨论.ppt

* * * * * * * * * * * * * * 设计实例 Transient response 典型的LDO负载瞬态响应 与环路的相位裕度有关 与闭环带宽及调整管栅极slew_rate有关 * * 设计实例 Transient response—ESR effect 对于负载电流突变的情况，ESR电阻会对输出电压的瞬态变化产生一定影响，在同样的负载电流变化条件下，ESR电阻越大，输出电压的尖峰越大，本例中电压尖峰持续时间~200ns * * 设计实例 Transient response Load Transient Line Transient undershoot:132mv;overshoot:82mv overshoot:130mv;undershoot:38mv * * 设计实例 Transient response 瞬态性能增强电路 （C_par100pF） 作用： 增强瞬态响应性能（w:ov=79mv, wo:ov=893mv） 改善频率响应特性（w:PM(300mA)=76°, wo:PM(300mA)=30.5°） * * 设计实例 温度特性 (TT:~20ppm) 功率效率 LDO温度特性与基准电压温度特性和反馈网络温度特性密切相关 LDO功率效率与输入电压和负载电流相关，输入电压越低，负载电流越大，效率越高 Other characteristics * * 参考文献 Ricon-mora, ‘current efficient low voltage low dropout regulator’. Ka Chun Kwok, ‘Pole-zero tracking frequency compensation for low dropout regulator’, 2002 IEEE. Ricon-mora, ‘active capacitor multiplier in miller-compensated circuits’, IEEE transactions on solid state circuits, Vol. 35, No. 1, January 2000. Wei Chen, et al, ‘Dual-loop feedback for fast low dropout regulators’, 2001 IEEE. Texas Instruments, ‘Technical review of low dropout voltage regulator operation and performance’, August 1999. Chaitanya K. Chava, ‘A frequency compensation scheme for LDO voltage regulators’, IEEE Trans. On circuits and systems-1: regular papers, VOL. 51, No. 6, June, 2004. * * 参考文献 Lai Xin Quan, et al, ‘A 3-A CMOS low-dropout regulator with adaptive miller compensation’, Analog Integr. Circ. Sig. Process, 2006, 49:5-10. Hsuan-I Pan, et al, ‘A CMOS low dropout regulator stable with any load capacitor’, 2004 IEEE. Akira Yamazaki, et al, ‘A frequency compensation technique for variable output low dropout regulators’, 2006 IEEE. Ka Nang Leung, et al, ‘ A capacitor free CMOS low-dropout regulator with damping-factor-control frequency compensation’, IEEE JSSC, Vol. 38, No. 10, October 2003. * * * * * * * * * 为了保证一定的相位裕度，要求P3在UGF之外，因此误差放大器的输出阻抗不能太大，环路增益受到限制，使得负载调整率和线性调整率性能变差 * 零负载静态电流23uA，最大静态功耗230uA，最大输出电流18mA@1V和50mA@1.2V，60mA时dropout电压为232mV，瞬态响应19mv（0~50mA） * * * * * 为利用zf进行补偿，要求