The Verilog Hardware Description Language Extra MaterialsVerilog硬件描述语言的额外材料.pptVIP

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The Verilog Hardware Description Language Extra MaterialsVerilog硬件描述语言的额外材料.ppt

The Verilog Hardware Description Language Extra MaterialsVerilog硬件描述语言的额外材料

The Verilog Hardware Description Language Professor Don Thomas Carnegie Mellon University (CMU) thomas@ /~thomas This is not one cohesive presentation on Verilog. The slides contained here are collected from different CMU classes at various academic levels. These slides are provided as an alternate aid to learning the language. You may find them helpful. Send bug reports to the above address — there are some! The Verilog Hardware Description Language, Fifth Edition is available from Kluwer Academic Publishers, . Phone: 781-871-6600. Use or reproduction of the information provided in this file for commercial gain is strictly prohibited. Explicit permission is given for the reproduction and use of this information in an instructional setting. Representation: Structural Models Structural models Are built from gate primitives and/or other modules They describe the circuit using logic gates — much as you would see in an implementation of a circuit. Identify: Gate instances, wire names, delay from a or b to f. This is a multiplexor — it selects one of n inputs (2 here) and passes it on to the output Representation: Gate-Level Models Need to model the gate’s: Function Delay Function Generally, HDLs have built-in gate-level primitives Verilog has NAND, NOR, AND, OR, XOR, XNOR, BUF, NOT, and some others The gates operate on input values producing an output value typical Verilog gate instantiation is: and #delay instance-name (out, in1, in2, in3, …); and #5 g1 (f1, a, nsel); Four-Valued Logic Verilog Logic Values The underlying data representation allows for any bit to have one of four values 1, 0, x (unknown), z (high impedance) x — one of: 1, 0, z, or in the state of change z — the high impedance output of a tri-state gate. What basis do these have in reality? 0, 1 … no question z … A tri-state gate drives either a zero or one on its output…and if it’s not doing that, its output is high impedance (z). Tri-state gates are real devices and z is a real elec

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